Loaction:Home > Product > MCU

MCU Description

MCU (Microcontroller Unit) is also called Single Chip Microcomputer. MCU is CPU with the appropriately-reduced frequency and specification, integrated with the peripheral interfaces, like memory, Timer, USB, A/D convertor, UART, PLC, and DMA, etc. Even the LCD driver circuit is integrated into single chip to realize the chip-level computer. Different combinations are carried out for different application fields.

V85xx

V85xx is a MCU chip specialized for smart meter. It integrated Cortex-M0 CPU, Flash/RAM memory, real-time clock module with independent power supply, hardware encryption module, LCD, GPIO, and all kinds of communication interfaces. It is a multi-functional MCU with the high cost-performance ratio. 

·Working voltage (V8500/V8530/V8510): 2.2V ~ 5.5V. 
·Working voltage (V8520): 2.2V ~ 3.6V.
·Working Current:
- Normal mode: 1.633 mA @6.5536MHz
- Idle mode: 0.379 mA @6.5536MHz
- Sleep mode (LCD active, RTC_PSCA=0, VDD=3.3V, AVCCLDO power down): 9.3μA
- Sleep mode (LCD inactive, RTC_PSCA=0, VDD=3.3V, AVCCLDO power down): 3.1μA
- Deep Sleep mode (RTC_PSCA=0, VDD=3.3V, AVCCLDO power down): 2.9μA
- RTC only mode (RTC_PSCA=0, BATRTC=3.3V): 1.3μA
·Package:
- LQFP100 (V8500)
- LQFP80 (V8530)
- LQFP64 (V8510)
- TQFP48 (V8520)
·Operation Temperature: -40~+85℃
·Storage Temperature: -55~+150℃
·MCU
- 32 bits Cortex-M0 with maximum 26.2144MHz operation speed.
- Single cycle multiplier.
- Standard 2-wires SWD debug interface.
- 256KB FLASH with write protect, support both IAP and ISP (V8510 and V8520 only support 128KB FLASH).
- 32K bytes SRAM with parity check and data retention under sleep mode.
- 256 bytes SRAM with data retention under deep-sleep mode.
- Support abort exception detection including FLASH check-sum error, SRAM parity error, memory address error and memory align error.
·Interface Controller
- Maximum 6 UART controllers with parity check.
- Each UART TX channel can be coupled with IR carrier for IR transmission.
- Maximum 2 ISO7816 controllers.
- Maximum 2 SPI master/slave controllers.
- Maximum 1 I2C master/slave controller.
- 4 32 bits timers.
- 4 16 bits PWM timers.
- 4 channels DMA controller.
- 128/192/256 bits AES CODEC.
- ECC encrypt/decrypt accelerated engine.
- Dual frame buffer LCD controller
·V8500: 4COM/6COM/8COM.
·V8530: 4COM/6COM/8COM.
·V8510: 4COM/6COM/8COM.
·V8520: 4COM/6COM/8COM.
·1/3 or 1/4 bias.
·Support multi-kinds of scan frequency.
·LCD voltage: The default output is about 3.3V. Adjustment range: 2.7~3.6V, 0.06V per step.
- Watch dog timers with programmable period.
- Support multiple wake-up sources under each mode.
- Maximum 80 GPIOs.
- Maximum 16 GPIOs can be external interrupt and wakeup sources under all modes.
· Analog Controller
- 16bits ADC with 10Ksps.
- Maximum 8 external input.
- ADC supports manual sample mode or auto sample mode.
- Maximum 2 comparators with single end input or differential input.
- Embedded 32KHz and 6.5MHz RCO.
- Embedded 2 PLLs.
- Support external 32.768KHz crystal or 6.5536MHz crystal (optional).
- Support crystal absent detect for both 32.768KHz and 6.5536MHz crystal.
- Each clock can be selected to be system clock.
- Support digital clock divider up-to 1/256.
- Support low voltage detection with programmable level.
- Support power-on reset for both AVCC and DVCC.
- Support two DC input with auto-switch function and voltage detection for each input.
- Support standalone RTC battery input.
- Support 1ppm RTC auto-calibration under all modes.



  Link

Vango News Service

  Download

Tool Document

  Company

Recruitment Contact

  Language

SC EN
Copyright © by Vango Technologies, Inc. All rights reserved.